Lecture 17 - S-R,J-K and D Flip Flops

Lecture series on Digital Circuits & Systems by Prof. S. Srinivasan,
Department of Electrical Engineering, IIT Madras
For more details on NPTEL visit http://nptel.iitm.ac.in

Category:

Education

Tags:

• Digital
• Circuits
• and
• System
• flip
• flop

[gauravzerogravity]

u r great sir

and by the way will u teach my teacher

he knows nothing

[jsudeera]

my friend shoot3, i think u have watched a wrong u tube clip, if u want to hear nice english u better watch a english lession.

u have no manners.

this prof is one of the best teachers i ever seen. have some gratitude for what u learned from him.

[mjqatif]

is it supposed to take a long time to start or is it just not working?

[luchipher2007]

thanks .... iit india

[shoot3utube]

i was struggling so hard before i saw this...brilliant, too bad his english accent is a little poor.

[gregsmith1988]

Brilliant. This blokes just explained quickly something I took a whole year of my first year of my course to get to grips with. Thankyou.

[ramadno2008]

summary

[ruthvins7]

this is superb

[ruthvins7]

this is superb great i mean REALLLY HELPFUL thanks a lot. amazing lecture cleared all my doubts

[L1nK89]

at 36:00 of the clip i dont understand why the output of the top NAND gate is changed from 1 to 0.. cuz at this point isent the inputs for the top right NAND gate 1 (from S) and 0 (from initial Q' output)?

this would mean the top right gate should output invert(0) which is 1 but its changed from Q=1 to Q=0 instead..?