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Parallel Architecture for Hierarchical Optical Flow Estimation Based on FPGA.wmv

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Uploaded by on Nov 16, 2011

Abstract—The proposed work presents a highly parallel architecture
for motion estimation. Our system implements the well known Lucas and Kanade algorithm with the multi-scale extension for the computation of large motion estimations in a dedicated device [field-programmable gate array (FPGA)]. Our system achieves 270 frames per second for a 640 480 resolution in the best case of the mono-scale implementation and 32 frames per second for the multi-scale one, fulfilling the requirements for a real-time
system. We describe the system architecture, address the evaluation of the accuracy with well-known benchmark sequences (including a comparative study), and show the main hardware resources used.

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