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Cadence Accelerated VIP Demo

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Published on May 30, 2012

Dramatically boost verification throughput with Cadence Accelerated VIP and the Palladium XP hardware accelerator.

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  1. 319

    What Made CDNLive! EMEA 2012 Such a Great Event?

  2. 320

    Allegro/OrCAD Roadmaps and Techtorials Event

  3. 321

    Cadence PCB Signal and Power Integrity 3-Day Event Featuring Robert Hanson

  4. 322

    AMD - Cadence Palladium XP & In-Circuit Acceleration Success Video

  5. 323

    Global Unichip - Cadence giga-gate/GHz, 28nm design success Video

  6. 324

    Freescale - Cadence Palladium XP Success Video

  7. 325

    Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  8. 326

    Global Unichip Low Power Success Video

  9. 327

    IBM and Cadence Collaborate to Solve Advanced Node Design Challenges

  10. 328

    Silicon Blue Technologies - Cadence DFM Services Success Video

  11. 329

    Freeescale Semiconductor - Cadence Low-Power Solution for Kinetis SoC

  12. 330

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 3 of 3

  13. 331

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 2 of 3

  14. 332

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 1 of 3

  15. 333

    CDNLive! EMEA 2012 Keynote: Tom Beckley, Cadence Design Systems- Highlights, Part 1 of 2

  16. 334

    CDNLive! EMEA 2012 Keynote: Tom Beckley, Cadence Design Systems- Highlights, Part 2 of 2

  17. 335

    CDNLive! EMEA 2012 Keynote: Lip-Bu Tan, CEO, Cadence Design Systems - Highlights

  18. 336

    Improve Verification Productivity using Save, Restore, Reseed

  19. 337

    Cadence Announces New Accelerated Verification IP at CDNLive! EMEA 2012

  20. 338

    Cadence Announces New System and SoC Verification Technologies at CDNLive! EMEA 2012

  21. Cadence Accelerated VIP Demo

  22. 340

    Dr. Eckhard Hennig on the Cadence Academic Network and CDNLive! EMEA

  23. 341

    Dr. Joachim Rodrigues on the Cadence Academic Network and CDNLive! EMEA

  24. 342

    Marcel Preda, Infineon - CDNLive! EMEA 2012 Paper Presentation Summary

  25. 343

    Interview with Best Paper Award Winners at CDNLive! EMEA 2012

  26. 344

    CDNLive! 2012 EMEA Best Paper Awards Ceremony

  27. 345

    The Introduction of In-Circuit Acceleration into the Cadence System Development Suite

  28. 346

    UVM e Basics 20 - Configuration

  29. 347

    UVM e Basics 23 - Objections

  30. 348

    UVM e Basics 21 - Aspect Oriented Programming

  31. 349

    UVM e Basics 19 - Test

  32. 350

    UVM e Basics 15 - Module UVC

  33. 351

    UVM e Basics 24 - Signal Map

  34. 352

    UVM e Basics 22 - Phases

  35. 353

    UVM e Basics 8 - Sequence

  36. 354

    UVM e Basics 16 - Scoreboard

  37. 355

    UVM e Basics 6 - Monitor

  38. 356

    UVM e Basics 18 - Testbench

  39. 357

    UVM e Basics 17 - DUT Functional Coverage

  40. 358

    UVM e Basics 14 - Virtual Sequence Driver - Sequence

  41. 359

    UVM e Basics 13 - Interface UVC Environment

  42. 360

    UVM e Basics 9 - BFM

  43. 361

    UVM e Basics 11 - Agent

  44. 362

    UVM e Basics 7 - Sequence Item

  45. 363

    UVM e Basics 4 - Interface UVC

  46. 364

    UVM e Basics 12 - Agent Types

  47. 365

    UVM e Basics 10 - Sequence Driver

  48. 366

    UVM e Basics 5 - Collector

  49. 367

    UVM e Basics 3 - UVM Environment

  50. 368

    UVM e Basics 1 - Introduction

  51. 369

    UVM e Basics 2 - Example DUT

  52. 370

    UVM SV Basics 15 - Module UVC

  53. 371

    UVM SV Basics 20 - Configuration

  54. 372

    UVM SV Basics 21 - Factory

  55. 373

    UVM SV Basics 14 - Virtual Sequencer-Sequence

  56. 374

    UVM SV Basics 24 - Virtual Interface

  57. 375

    UVM SV Basics 16 - Scoreboard

  58. 376

    UVM SV Basics 22 - Phases

  59. 377

    UVM SV Basics 23 - Objections

  60. 378

    UVM SV Basics 19 - Test

  61. 379

    UVM SV Basics 18 - Testbench

  62. 380

    UVM SV Basics 5 - Collector

  63. 381

    UVM SV Basics 9 - Driver

  64. 382

    UVM SV Basics 13 - Interface UVC Environment

  65. 383

    UVM SV Basics 11 - Agent

  66. 384

    UVM SV Basics 17 - DUT Functional coverage

  67. 385

    UVM SystemVerilog Basics 7 -- Sequence Item

  68. 386

    UVM SV Basics 10 - Sequencer

  69. 387

    Universal Verification Methodology SV Basics 6 - Monitor

  70. 388

    UVM SV Basics 12 - Agent Types

  71. 389

    Universal Verification Methodology SystemVerilog Basics -- Sequence

  72. 390

    UVM SV Basics 1 - UVM Introduction

  73. 391

    UVM SV Basics 4 - Interface UVC

  74. 392

    UVM SV Basics 3 - UVM Environment

  75. 393

    UVM SV Basics 2 - DUT Example

  76. 394

    I want to be a Cadence VIP

  77. 395

    CDNLive! EMEA 2012 - connect. share. inspire.

  78. 396

    Cadence Straight Up

  79. 397

    You too can be a Cadence VIP

  80. 398

    Highlights from DVCon 2012

  81. 399

    Erik Panu on how Cadence VIP helps customers

  82. 400

    Tom Beckley at CDNLive! EMEA 2012

  83. 401

    CDNLive! EMEA 2012 Paper Presentation Preview: Andre Winkelmann, Wolfson Microelectronics

  84. 402

    CDNLive! EMEA 2012 Paper Presentation Preview: Oskar Andersson, Lund University

  85. 403

    CDNLive! EMEA 2012 Paper Presentation Preview: Marleen Boonen, Methods2Business

  86. 404

    CDNLive! EMEA 2012 Paper Presentation Preview: Rainer Mann, GLOBALFOUNDRIES

  87. 405

    CDNLive! EMEA 2012 Paper Presentation Preview: Rolf Nick, FlowCAD

  88. 406

    Joe Hupcey lll previews formal analysis "apps" tutorial at DvCon 2012

  89. 407

    Xilinx and Cadence - Virtual Processing Platform and Zynq-7000

  90. 408

    Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  91. 409

    Xilinx - Cadence Virtual Processing Platform and Zynq-7000

  92. 410

    ARM TechCon 2011 -- Cadence-Arm Fireside Chat 2011

  93. 411

    All Things Analog - Interview with Triune Systems

  94. 412

    All Things Analog - Interview with GHz Circuits, Inc.

  95. 413

    All Things Analog - Interview with Designer's Guide Consulting, Inc.

  96. 414

    ARM TechCon 2011 -- DDR4, Higher Speeds and Larger SoCs

  97. 415

    ARM TechCon 2011 -- Creation and Usage of SystemC

  98. 416

    ARM Tech Con 2011 -- Early Architectural Planning using Cadence EDI System

  99. 417

    ARM Tech Con 2011 -- Creating an Effective 32/28nm ARM SoC Design Methodology

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