1. What Made CDNLive! EMEA 2012 Such a Great Event?

  2. Allegro/OrCAD Roadmaps and Techtorials Event

  3. Cadence PCB Signal and Power Integrity 3-Day Event Featuring Robert Hanson

  4. AMD - Cadence Palladium XP & In-Circuit Acceleration Success Video

  5. Global Unichip - Cadence giga-gate/GHz, 28nm design success Video

  6. Freescale - Cadence Palladium XP Success Video

  7. Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  8. Global Unichip Low Power Success Video

  9. IBM and Cadence Collaborate to Solve Advanced Node Design Challenges

  10. Silicon Blue Technologies - Cadence DFM Services Success Video

  11. Freeescale Semiconductor - Cadence Low-Power Solution for Kinetis SoC

  12. CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 3 of 3

  13. CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 2 of 3

  14. CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 1 of 3

  15. CDNLive! EMEA 2012 Keynote: Tom Beckley, Cadence Design Systems- Highlights, Part 1 of 2

  16. CDNLive! EMEA 2012 Keynote: Tom Beckley, Cadence Design Systems- Highlights, Part 2 of 2

  17. CDNLive! EMEA 2012 Keynote: Lip-Bu Tan, CEO, Cadence Design Systems - Highlights

  18. Improve Verification Productivity using Save, Restore, Reseed

  19. Cadence Announces New Accelerated Verification IP at CDNLive! EMEA 2012

  20. Cadence Announces New System and SoC Verification Technologies at CDNLive! EMEA 2012

  21. Cadence Accelerated VIP Demo

  22. Dr. Eckhard Hennig on the Cadence Academic Network and CDNLive! EMEA

  23. Dr. Joachim Rodrigues on the Cadence Academic Network and CDNLive! EMEA

  24. Marcel Preda, Infineon - CDNLive! EMEA 2012 Paper Presentation Summary

  25. Interview with Best Paper Award Winners at CDNLive! EMEA 2012

  26. CDNLive! 2012 EMEA Best Paper Awards Ceremony

  27. The Introduction of In-Circuit Acceleration into the Cadence System Development Suite

  28. UVM e Basics 20 - Configuration

  29. UVM e Basics 23 - Objections

  30. UVM e Basics 21 - Aspect Oriented Programming

  31. UVM e Basics 19 - Test

  32. UVM e Basics 15 - Module UVC

  33. UVM e Basics 24 - Signal Map

  34. UVM e Basics 22 - Phases

  35. UVM e Basics 8 - Sequence

  36. UVM e Basics 16 - Scoreboard

  37. UVM e Basics 6 - Monitor

  38. UVM e Basics 18 - Testbench

  39. UVM e Basics 17 - DUT Functional Coverage

  40. UVM e Basics 14 - Virtual Sequence Driver - Sequence

  41. UVM e Basics 13 - Interface UVC Environment

  42. UVM e Basics 9 - BFM

  43. UVM e Basics 11 - Agent

  44. UVM e Basics 7 - Sequence Item

  45. UVM e Basics 4 - Interface UVC

  46. UVM e Basics 12 - Agent Types

  47. UVM e Basics 10 - Sequence Driver

  48. UVM e Basics 5 - Collector

  49. UVM e Basics 3 - UVM Environment

  50. UVM e Basics 1 - Introduction

  51. UVM e Basics 2 - Example DUT

  52. UVM SV Basics 15 - Module UVC

  53. UVM SV Basics 20 - Configuration

  54. UVM SV Basics 21 - Factory

  55. UVM SV Basics 14 - Virtual Sequencer-Sequence

  56. UVM SV Basics 24 - Virtual Interface

  57. UVM SV Basics 16 - Scoreboard

  58. UVM SV Basics 22 - Phases

  59. UVM SV Basics 23 - Objections

  60. UVM SV Basics 19 - Test

  61. UVM SV Basics 18 - Testbench

  62. UVM SV Basics 5 - Collector

  63. UVM SV Basics 9 - Driver

  64. UVM SV Basics 13 - Interface UVC Environment

  65. UVM SV Basics 11 - Agent

  66. UVM SV Basics 17 - DUT Functional coverage

  67. UVM SystemVerilog Basics 7 -- Sequence Item

  68. UVM SV Basics 10 - Sequencer

  69. Universal Verification Methodology SV Basics 6 - Monitor

  70. UVM SV Basics 12 - Agent Types

  71. Universal Verification Methodology SystemVerilog Basics -- Sequence

  72. UVM SV Basics 1 - UVM Introduction

  73. UVM SV Basics 4 - Interface UVC

  74. UVM SV Basics 3 - UVM Environment

  75. UVM SV Basics 2 - DUT Example

  76. I want to be a Cadence VIP

  77. CDNLive! EMEA 2012 - connect. share. inspire.

  78. Cadence Straight Up

  79. You too can be a Cadence VIP

  80. Highlights from DVCon 2012

  81. Erik Panu on how Cadence VIP helps customers

  82. Tom Beckley at CDNLive! EMEA 2012

  83. CDNLive! EMEA 2012 Paper Presentation Preview: Andre Winkelmann, Wolfson Microelectronics

  84. CDNLive! EMEA 2012 Paper Presentation Preview: Oskar Andersson, Lund University

  85. CDNLive! EMEA 2012 Paper Presentation Preview: Marleen Boonen, Methods2Business

  86. CDNLive! EMEA 2012 Paper Presentation Preview: Rainer Mann, GLOBALFOUNDRIES

  87. CDNLive! EMEA 2012 Paper Presentation Preview: Rolf Nick, FlowCAD

  88. Joe Hupcey lll previews formal analysis "apps" tutorial at DvCon 2012

  89. Xilinx and Cadence - Virtual Processing Platform and Zynq-7000

  90. Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  91. Xilinx - Cadence Virtual Processing Platform and Zynq-7000

  92. ARM TechCon 2011 -- Cadence-Arm Fireside Chat 2011

  93. All Things Analog - Interview with Triune Systems

  94. All Things Analog - Interview with GHz Circuits, Inc.

  95. All Things Analog - Interview with Designer's Guide Consulting, Inc.

  96. ARM TechCon 2011 -- DDR4, Higher Speeds and Larger SoCs

  97. ARM TechCon 2011 -- Creation and Usage of SystemC

  98. ARM Tech Con 2011 -- Early Architectural Planning using Cadence EDI System

  99. ARM Tech Con 2011 -- Creating an Effective 32/28nm ARM SoC Design Methodology