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"Our first reaction was, 'This tool will leave
the PCB designers without much work to
do, We used Allegro Global
Route Environment to create our high-level
routing strategy. We used the Interconnect
Feasibility capability to check on available
space for each of the flows and modify our
routing strategy accordingly." — Dejan Banic, Hardware Design Engineer, JDSU

"Allegro Global Route Environment helped us successfully reduce PCB
place-and-route design time... In the end we were able to shorten the
cycle by 50% compared to previous interactive approaches."
— Dejan Banic, Hardware Design Engineer, JDSU

"With Allegro FPGA System Planner, we finalized the pin assignment after the first pass, with only one or two pin swaps. In the front-end design process alone, we realized a 30% to 40% time savings. In addition, we realized a 50% time reduction in routing high-speed signals."
Bogdan Petrisor, Hardware Design Engineer, JDSU

CERN -- the European Organization for Nuclear Research -- Utilizes Cadence Services to Create and Maintain Design Environments for Internal Teams as Well as Partners
www.cadence.com/cadence/newsro­om/press_releases/Pages/pr.asp­x?xml=032211_cern&CMP=home

"The Cadence (ASA) solution enables us to enter up to 99 percent of signals in table format, which, along with improved analytics and a unique integrated environment, reduces our PCB development time by 80 percent."
Gisbert Thomke, Group Leader, IBM R&D Lab Germany

Can't see a video you want? please feel free to conatct us and we will make one and put it up for you.

Compare the new Cadence OrCAD suites with the comparison matrix available for download here http://www.parallel-systems.co­.uk/e-mail/MATRIX-PCB_Suites_N­OV_2010.pdf

The new SI + PCB Performance suite from Cadence provides a revolutionary set of features and price.
In this video we can see the integrated tool flow. Using Capture and PCB editor in perfect harmony.
We also share with you the way PCB Editor performs complex tasks with ease and simplicity. The key advantage over other software is that the Cadence PCB Editor feeds from a centralised constraint manager. This allows constraints to be re-used on future designs.
Having the ability to create regions on a board that have a different set of rules means that, once set up all the engineer needs to do is to route and the tools will obey the rules for them in real time.
Differential pairs can be specified and routed together with delay tuning included.

It also features a Signal Integrity tool that includes pre and post analysis along with topology extraction.