Designation 'n' Exploitation
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Intel 2732A EPROM Read-By-Hand Example & Schematic (User Request)
Tbird761
52 views
A quick overview of how to read the contents of a simple memory device like the Intel 2732A EPROM by hand with both schematical reference and functional description.
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CPLD SVGA Output Test
Tbird761
164 views
As of today, I've successfully created a "video card" using nothing more than a Xilinx 9500XL CPLD. This is just the first (successful) test of VGA style output I've done ...
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ORG M1 Running
Tbird761
133 views
ORG M1 running a small program.
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LED Debug Board (Full Test)
Tbird761
132 views
Full-scale diagnostic for the reduced-IO, 96-bit debug board, shown here running a 100 Hz frame rate and a 5 MHz fill rate.. It works! All bits address properly. =)
9...
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Adventures in Ultracapacitors
Tbird761
1,021 views
These things store a retarded amount of power.
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SuperLOL: Dual Pentium Pro 200 + Quake III Arena
Tbird761
887 views
Hardware this old was never meant to play something so demanding nor interface with peripherals so modern. I like the crazy juxtoposition that really focuses on the abilit...
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Fun with F-RAM, Redux
Tbird761
277 views
A quick demo of some fun reading from and writing to a fancy one-megabit ferroelectric RAM (F-RAM / FeRAM) device with a more modern Xilinx Spartan 6 LX FPGA and new, simpl...
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Geoff's FPGA User Constraints Editor
Tbird761
691 views
After finding myself hooked on the visual net assignment feature of PlanAhead but endlessly frustrated by PlanAhead's tendency to corrupt UCF files, I took matters into my ...
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Reading an Ancient 32K Intel EPROM By Hand
Tbird761
725 views
Yesterday I discovered a veritable relic in the shop. Inside a tackle box that was acquired with a bunch of other stuff at an auction was an Intel D732A. That's a 32 Kilo...
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Intro to FPGAs for Software Engineers - Part 7 - Binary Counter Project (Part 2)
Tbird761
2,463 views
In this second of two videos (parts 6 and 7), you will walk through boolean logic, conditionals (if statements), basic arithmetic, and edge-triggered combinational logic in...
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