Awesome! Keep up the hard work!
apprentix 1 month ago
@apprentix Thanks! It was not as difficult as I expected. The VHDL code for the CPLD is just 282 lines so far, easier than the usual FPGA and embedded systems development stuff I do for a living
frankbuss 1 month ago
nice
cupididi 1 month ago
Awesome! Keep up the hard work!
apprentix 1 month ago
@apprentix Thanks! It was not as difficult as I expected. The VHDL code for the CPLD is just 282 lines so far, easier than the usual FPGA and embedded systems development stuff I do for a living
frankbuss 1 month ago
nice
cupididi 1 month ago