EEVblog #58 - Warm and Fuzzy FPGA Troubleshooting

[SpecialDux]

Great video thanks for sharing

[FrancekPirosrancek]

so this is you at work or at home?

[EEVblog]

@FrancekPirosrancek it's my home lab.

[gryzman]

they are americans, freedom isn't their strongest suit these days

[KingKongSamurai]

You didnt include the SPI controller in SOPC builder. Verilog is still considered hardware, not software. So it is a hardware problem, not software.

[SianaGearz]

@KingKongSamurai Point of view thing. If you're a C programmer, HDL is hardware, if you're a board designer, HDL is software. I'd easily call it software, because if you think back to the origin terms, hardware is part of the computing equipment you can't change once it's out, software is something that can be changed. I don't see why it matters whether it's written in command-oriented language or one describing hardware-like structures.

[KingKongSamurai]

@SianaGearz Sure, you can argue about it like that. But In academics and pretty much everywhere in the industry, HDL layer is a hardware layer. Its convenient, but very misleading to call it software. Software is a very general term for a program/routine that run on a processor. HDL(Hardware) is coding a digital logic circuit. Very different paradigms. I can design a CPU using HDL(hardware), on which I can load a program(software) on it.

[frankm81m82]

First off I real;y enjoyed this video, but

I don't think you found/understand the root cause of this problem, Based on my experience the problem will most likely return at a most inopertune time. Keep digging if you have the time and money, I recommebd you use Altera's internal logic analyser(if you can) to get more insite, Great video though.

[Salamander014]

My favorite programming language is also solder :)

[CDMCSD2]

I would say it's not a good soft-core CPU you have used. Either it was not clear enough regardin the SPI protocol, or you missed a great thing in it.

Further more, it can be because of a default voltage level on one of the control pins, which happend to be ok accidentaly on that series of FPGAs, and not ok on the other series.

Funny enough, checking the FPGA is the first thing you should go through. I always put an LED on the board to show the sequence of booting. It helps...

[Films4You]

Solder, coding, is OPP. (Object oriented programming), if you use flux LOL

[williefleete]

i think the numbers is year and week the batch was done

one on the left week 52 of 2008 and the right week 45 of 2002

[HolgerHartenstein]

Good to know. Thank-You Dave .

BINFILE CRC +

HARDWARE KERNEL-MASK.Rev CRC.

= FIRMWARE CRC.

PS.

My ZILOG ez8 Encore has a Product.CRC

You can read out.

+ A Batch CRC.

[averagemale2000]

great insight and detail... do you have a photo/link of this device once completed and packaged? Always wondered what the end product of the devices you work on look like.

[BRUCE24098]

Great Video! Can any one suggest a cheap beginners FPGA set up??

[kd4rhp]

I wonder if all the I/O were metastable double-FF'd and no combinatorial inputs?

True, SW must be robust, especially where transients are involved. Low power design with power regions makes this especially interesting.

[AlvinAndries]

Hi Dave,

Aren't you a bit fast to blame the software? Is the hardware behaving as spec'd? Is marginal timing breaking down some component? If an interrupt controller is giving 2 edges per interrupt, a slower ISR will mask the error, but it won't be solved. So, can you be 100% sure that the hardware is fine?

[vaneenbergen]

Is this project based upon the altum nanonoard 3000?

[dc100GHz]

Good video to reprimand software guys.

[maclover201]

Wow, that's really strange. I agree, the best programs are electronic circuits because they are the most bug-free. But WOW, turns out that tight tolerances don't always mean exact results every single time, especially with firmware.

[stormbytes]

Wow.. You must've been climbing the walls! Man! Thanks for sharing. That's a really good point. You had no choice but to go into the software to figure out what was going wrong. Speaking of troubleshooting, think you could do an episode on "Oscilloscope use in Basic Troubleshooting" ? :) there's a thought!

[aynair]

Dave, there is an excellent article on FPGAs programmed by a genetic algorithm. The experiment showed how importand analog behaviour of digital chip can be. Check out first entry in google for the phrase:

Explorations in Design Space: Unconventional susx

Cheers!

[baddspella]

Post more offten Dave :)