Added: 2 years ago
From: cgcclive
Views: 35,911
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  • I'm leaving univerrsity right away, it's no damn use! I watch you all the time to clear my doubts haha, you're the BEST

  • Great vid thanks!!

  • great stuff

  • great lecture...

  • I feel like these videos will save my grade from CS231 :D

  • What if you have an active low preset in between the rising edge clock signals? Would that affect Q, or is that only when the active low preset occurs during a rising edge clock signal?

  • thank you :)

  • Alright, now that i found this awesome Jim, i can skip my lectures :D

  • Great lecture, just in time for my tutorial later. :)

  • You are awsome!!!

  • I'm going to be faving all of your vids and liking them, I learn so much from them.

  • ...

  • JIM YOU ARE MADE OF AWESOME!

  • 1 man is VERY blind

  • Wrong minute 11:35 when j0 k1 current stat 1 should stay in 1. look at basic sr latch when set 1 r 0 it sets to 1 !!!

  • I clicked at 9:35

    Great Tutorial! Please make more :D

  • Could explain me how can I build a FF T? I want to divide frequency using that.

    Your videos are very helpful

    thanks

  • Cool

  • Can I download This video?

  • thank's for the video but i need some help...

    how can i make the clock?

    just a +5V or do i need pulse generator?

  • @MusicAddictedGr Use a switch to simulate the clock

  • I was looking for minecraft :D

  • This video was so helpful, and suprisingly not boring at all. Thank you. I'm going to watch all of these before my final next week.

  • Hi,

    jim can u put on some introductory lessons for VHDL....

  • thank you! I finally understand this

  • thanks very much for your time and it really helped me. 

  • Thank you so much!!

  • Thanks.. the video really helped.. however toggle is spelt wrong.. but who cares i understood every bit of JK flipflops..!!

  • Thanks ;)

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