I have to finish conditioning my cell, its A new drycell. I want to run it with KOH at 30 Amps and My PWM then do Temperature test and look at the wave form, to make sure every thing will run smoothly. I would have to estimate 2 weeks. I dont have a lot of time to devote to HHO. If you look at my website I have 2 other projects ongoing Zspan and PowerStick these designs are to be used at my work as test equipment. Plus my cell install!
My documented adventure on YouTube so far had been what I have learned the mistakes and breakthrough I have made. I give this information freely, So far I have not published any Documentation simply because it is not ready for reproduction. It must meet strict functional tests. As far as a preset device, this would be hard for me to preset up the device that you make and install. At this time I have no intention to make PWMs for other people.
I may consider making the PCB( The copper clad board with traces) for a nominal cost. The Idea of having a calibrated board that the end user could quickly adjust to some preset voltages in not impossible. And I have been thinking heavily on this subject. The problem with calibration of the PWM now is the Current Shunt, ZeroFossilFuel calls it R12. Each R12 is different, how do I know what one Amp is or thirty amps is on your Units Shunt?.
I've always used through hole components in my circuits and was thinking about giving SMD a try. Looking at some of the videos here on youtube, assembly looks like it may be easier with surface mount. Which method do you prefer?
A smaller cap is helpful. I have used SMD for the past 9 years where I work. I think it has meny advantages over through hole, and if you are laying out your own boards, You controll the pad size. I have layouts that can use several diferent caps on the same pad. You can mount older through hole as SMD like chips and even pots, like I do on my PWM. There are some exeptions like Plugs that need strength. No drilling 74 holes like ZFF stated in one of his videos. Make Solder wick your friend
Speeking of through hole! do you have the Velleman G106 sealed die cast aluminum enclosure that ZFF used on his PWM? I can not determin the exact size of his board, I was going to make a through hole version for those not ready for Surface Mount.
I've been working with a similar circuit. Main difference is I'm running the fet driver directly off 12 volt supply. Theory behind this is to charge the gate faster with the higher voltage. I haven't noticed any change in heating with different duty cycle. I have noticed an increase in temp with an increase in freq. Guess this would be because the percentage of time the fet is in transition vs. time increases with freq. Most heat produced during mid transition?
cuke8466, All current tests up to this video have been at a frequency of 1.5KHz. Have you seen the Duty cycle start to turn on when the freqency is grater then 5.5KHz, and cant reach 100 percent after this frequency? and is yours based on ZeroFossilFuel Circuit?
Yes, its based on zff. Yes I have seen duty cycle turn on at higher freq. Oscillator output voltage varies with freq. (triangle wave). Haven't tried it yet, but a possible fix might be a resistor divider net before pin 9 to shift voltage down.
cuke8466, I am running my driver chip off of the 10v regulator. I tend to take care when using supply voltages. Lots of noise in a cars electrical system. Looks like it is working for you, great. On ZFF circuit the driving gate voltage was around 8 volts. I would agree with your theory on in creased frequency verses heat. The heat sink has less time to disipate, and there are more trasistions. Use a biger heat sink! How meny fets are you using?
I'm using a large cap on the driver supply for filtering and to guarantee ample supply for the charge pulse. Just bench testing at the moment at 5 amps with an Ohmite 50W power resistor for the load. Using a single FET (no heatsink) but will most likely go up to 3 or 4 FETs when I hook up the generator. What are you getting for transition times at the gate? Mine are around 25 - 35 nS.
cuke8466, If you go to Video #13 In the notes section right of the video there is a link to several still OScope shots of my circuit. There is a time stamp that corresponds to the video on each still. The Rise time is 320nS No load on gate, using a Digital OScope, What driver chip are you using?
Driver is a Microchip TC4420 DIP-8. I should also note that I'm running the circuit on a prototyping board. I dont' have the extra capacitive load of the PC board like you do which may account for my lower transition time. (More capacitiance = longer charge time.) Gate capacitance of your extra FETs may also be adding to your times. 320nS is very respectable with your configuration. Wish I had a digital scope, much nicer than my old Tenma 72MHz!
I think the Freq limitation might be a problem because of the lack of real feed back, I was simulating R12 with a dial-a-volt input at R10. If U1 pin 14 is not saturated there will be some duty cycle limit. Do you have the MosFet operating and R12 installed? If you do check U1 pin 14 voltage at low freq and just above frequency cutout. Try readjusting the Current limit. Maybe the freq changes the averaging of C4. I do like the idea of dividing the voltage at U1 pin 9.
I measured 8.8V on pin 14 through the freq range. No variation on C4 through the freq range, with and without current limiting. Averaging seems to be stable.
Shorting R7 almost eliminated the freq limit. I think the resistor divider might solve the problem.
Reducing voltage to R10 will reduce voltage at pin 14, but that's how current limiting comes into play. One problem is the R6 VR1 R7 voltage divider reduces current limiting gain when duty cycle is reduced with VR1.
cuke8466, Thanks for the data. It inspired another thought, the upper rail of the LM324 is around 1.5 volts below VCC, Thats real world data from a project I did with a 6Volt Vcc Perhaps the gain on U1D comparator is not high enough Increasing R11 to 5 or 10 meg should shed some light on the Max output, The Data sheet seems to confirm this Vicr = VCC-1.5v, If I am reading the sheet right. What do you think?
So Back to the Saw tooth Signal U1 Pin 9 . I have seen that there is a spike at the peeks of the signal that measures about 75mV, And ZFF newest schematic has a new Capacitor C6 .001uf Perhaps this is to filter out this spike? That might reduce the Peek to peek from 8.8 to around 7.3 The highest voltage observed at 9.190KHz on pin 9 was 9.36V minus 1.5 and thats below 8.8. I cant test this, I dont have the cap will order it soon.
Will try a .01uF but may affect the Saw tooth to much?
Tested the C6 .01uF Cap it Rounded the Points on the Sawtooth. Was able to get a .001uF cap and install it. It did help reduce the spike but did not change the starting frequency of the Limiting.
cuke8466, The Sawtooth Signal is riding on about 4 volts DC. I belive this is the root of the problem. I tried to remove it by putting a cap inline at pin 9 but the Comparitor output at pin 8 drifted untill the pulse width limiting went to zero, and just stayed there. Have you tried the The voltage devider yet?
The triangle wave needs a dc offset to place the entire wave within the voltage range of the input at pin 10. The cap is actually a good idea. Follow it with a voltage divider. This combo should place the triangle wave at a constant DC offset that doesn't vary with freq.
I tried the voltage divider today. First tried it with the cap and straight biasing, but it hacked the triangle wave. Switched to just a divider and everything went great. I used 6.2K in series with the signal, and 10K from pin 9 to ground. Reduced R1 to 200 ohms to bring freq up to 11.5KHz, and had 100% duty cycle through the bandwidth.
I noticed a lot of oscillation in duty cycle when current limiting was in effect. I added a 47uF cap from pin 10 to ground and that stabilized limiting.
Great cuke8466, I love it when a problem can be solved, The only thing better is having less componets. I have Multisim from National Instruments A circuit simuator. Untill now I had a problem with the LM324 working in the program, I have been able to get it to function with this oscillator by subing U1B with a Virtual opamp. I can now get realistic outputs. I tried the cap in series with the signal and the addition of DC biasing. Look like that will work as well.
What looks vary promising is reducing R5 to about 8K lower if needed, The R4, R5 divider provides the Biasing to the oscilator, and seems to function perfectly, The cap is a great addition, I have also seen oscillation!, is the cap electrolittic? Space on my layout is a premium. An other 47uF cap no more room! Do you think a smaller ceramic cap would work there? I played with R1 too, Noticed small increase as i lowerd R1, or the pot. I will try 1.1k for R1 simulator has freq at 10.5KHz.
The 47uF is electrolytic. I also tried a 10uF ceramic and it also worked well, but still had a small amount of oscillation.
I should have checked power rating of the pot. Lowering R1 to 200 ohms burned it up. I guess a minimum for R1 should be around 500 ohms. Lowering the value of C1 would have been a better choice to bring freq up.
I have confirmed in circuit that R5 Will Change the DC bias at U1 Pin 9, I used a 7.5K at R5 and Modified the Frequency to 11.6KHz with a 1.21K at R1, and I had 100% duty cycle through the bandwidth. Still need to improve the lower limit, currently its at 1.36KHz would like it to be in specification at 1KHz.
Im sure the world is as eager to see your new pwm as i am, any idea on when you might post it on your web page?
crafter2u 3 years ago
I have to finish conditioning my cell, its A new drycell. I want to run it with KOH at 30 Amps and My PWM then do Temperature test and look at the wave form, to make sure every thing will run smoothly. I would have to estimate 2 weeks. I dont have a lot of time to devote to HHO. If you look at my website I have 2 other projects ongoing Zspan and PowerStick these designs are to be used at my work as test equipment. Plus my cell install!
H2O2FromH20 3 years ago
im just wondering how the avarage jo is suppost to set up the PWM, why dont you just make something that is preset?
crafter2u 3 years ago
My documented adventure on YouTube so far had been what I have learned the mistakes and breakthrough I have made. I give this information freely, So far I have not published any Documentation simply because it is not ready for reproduction. It must meet strict functional tests. As far as a preset device, this would be hard for me to preset up the device that you make and install. At this time I have no intention to make PWMs for other people.
H2O2FromH20 3 years ago
I may consider making the PCB( The copper clad board with traces) for a nominal cost. The Idea of having a calibrated board that the end user could quickly adjust to some preset voltages in not impossible. And I have been thinking heavily on this subject. The problem with calibration of the PWM now is the Current Shunt, ZeroFossilFuel calls it R12. Each R12 is different, how do I know what one Amp is or thirty amps is on your Units Shunt?.
H2O2FromH20 3 years ago
I've always used through hole components in my circuits and was thinking about giving SMD a try. Looking at some of the videos here on youtube, assembly looks like it may be easier with surface mount. Which method do you prefer?
cuke8466 3 years ago
A smaller cap is helpful. I have used SMD for the past 9 years where I work. I think it has meny advantages over through hole, and if you are laying out your own boards, You controll the pad size. I have layouts that can use several diferent caps on the same pad. You can mount older through hole as SMD like chips and even pots, like I do on my PWM. There are some exeptions like Plugs that need strength. No drilling 74 holes like ZFF stated in one of his videos. Make Solder wick your friend
H2O2FromH20 3 years ago
Speeking of through hole! do you have the Velleman G106 sealed die cast aluminum enclosure that ZFF used on his PWM? I can not determin the exact size of his board, I was going to make a through hole version for those not ready for Surface Mount.
H2O2FromH20 3 years ago
I have some ExpressPCB layout files for blank boards for the G106. Message me with your email and I'll send them to you.
cuke8466 3 years ago
I've been working with a similar circuit. Main difference is I'm running the fet driver directly off 12 volt supply. Theory behind this is to charge the gate faster with the higher voltage. I haven't noticed any change in heating with different duty cycle. I have noticed an increase in temp with an increase in freq. Guess this would be because the percentage of time the fet is in transition vs. time increases with freq. Most heat produced during mid transition?
cuke8466 3 years ago
cuke8466, All current tests up to this video have been at a frequency of 1.5KHz. Have you seen the Duty cycle start to turn on when the freqency is grater then 5.5KHz, and cant reach 100 percent after this frequency? and is yours based on ZeroFossilFuel Circuit?
H2O2FromH20 3 years ago
Yes, its based on zff. Yes I have seen duty cycle turn on at higher freq. Oscillator output voltage varies with freq. (triangle wave). Haven't tried it yet, but a possible fix might be a resistor divider net before pin 9 to shift voltage down.
cuke8466 3 years ago
Tried eliminating R7 (by shorting it) and it seemed to bring the 100% duty cycle freq limit up a bit.
cuke8466 3 years ago
cuke8466, I am running my driver chip off of the 10v regulator. I tend to take care when using supply voltages. Lots of noise in a cars electrical system. Looks like it is working for you, great. On ZFF circuit the driving gate voltage was around 8 volts. I would agree with your theory on in creased frequency verses heat. The heat sink has less time to disipate, and there are more trasistions. Use a biger heat sink! How meny fets are you using?
H2O2FromH20 3 years ago
I'm using a large cap on the driver supply for filtering and to guarantee ample supply for the charge pulse. Just bench testing at the moment at 5 amps with an Ohmite 50W power resistor for the load. Using a single FET (no heatsink) but will most likely go up to 3 or 4 FETs when I hook up the generator. What are you getting for transition times at the gate? Mine are around 25 - 35 nS.
cuke8466 3 years ago
cuke8466, If you go to Video #13 In the notes section right of the video there is a link to several still OScope shots of my circuit. There is a time stamp that corresponds to the video on each still. The Rise time is 320nS No load on gate, using a Digital OScope, What driver chip are you using?
H2O2FromH20 3 years ago
Driver is a Microchip TC4420 DIP-8. I should also note that I'm running the circuit on a prototyping board. I dont' have the extra capacitive load of the PC board like you do which may account for my lower transition time. (More capacitiance = longer charge time.) Gate capacitance of your extra FETs may also be adding to your times. 320nS is very respectable with your configuration. Wish I had a digital scope, much nicer than my old Tenma 72MHz!
cuke8466 3 years ago
I think the Freq limitation might be a problem because of the lack of real feed back, I was simulating R12 with a dial-a-volt input at R10. If U1 pin 14 is not saturated there will be some duty cycle limit. Do you have the MosFet operating and R12 installed? If you do check U1 pin 14 voltage at low freq and just above frequency cutout. Try readjusting the Current limit. Maybe the freq changes the averaging of C4. I do like the idea of dividing the voltage at U1 pin 9.
H2O2FromH20 3 years ago
I measured 8.8V on pin 14 through the freq range. No variation on C4 through the freq range, with and without current limiting. Averaging seems to be stable.
Shorting R7 almost eliminated the freq limit. I think the resistor divider might solve the problem.
Reducing voltage to R10 will reduce voltage at pin 14, but that's how current limiting comes into play. One problem is the R6 VR1 R7 voltage divider reduces current limiting gain when duty cycle is reduced with VR1.
cuke8466 3 years ago
cuke8466, Thanks for the data. It inspired another thought, the upper rail of the LM324 is around 1.5 volts below VCC, Thats real world data from a project I did with a 6Volt Vcc Perhaps the gain on U1D comparator is not high enough Increasing R11 to 5 or 10 meg should shed some light on the Max output, The Data sheet seems to confirm this Vicr = VCC-1.5v, If I am reading the sheet right. What do you think?
H2O2FromH20 3 years ago
Ok, I Have confirmed the 8.8V is the Rail, Used a 4 meg resister for R11 and there was no increase.
H2O2FromH20 3 years ago
So Back to the Saw tooth Signal U1 Pin 9 . I have seen that there is a spike at the peeks of the signal that measures about 75mV, And ZFF newest schematic has a new Capacitor C6 .001uf Perhaps this is to filter out this spike? That might reduce the Peek to peek from 8.8 to around 7.3 The highest voltage observed at 9.190KHz on pin 9 was 9.36V minus 1.5 and thats below 8.8. I cant test this, I dont have the cap will order it soon.
Will try a .01uF but may affect the Saw tooth to much?
H2O2FromH20 3 years ago
You can see the spike In video #13 OScope Still shot. #13 TEK0001 3m15s SawTooth.JPG
H2O2FromH20 3 years ago
Tested the C6 .01uF Cap it Rounded the Points on the Sawtooth. Was able to get a .001uF cap and install it. It did help reduce the spike but did not change the starting frequency of the Limiting.
H2O2FromH20 3 years ago
I added C6 also, but the spikes just lost amplitude. Probably need a slightly larger cap in my circuit.
cuke8466 3 years ago
cuke8466, The Sawtooth Signal is riding on about 4 volts DC. I belive this is the root of the problem. I tried to remove it by putting a cap inline at pin 9 but the Comparitor output at pin 8 drifted untill the pulse width limiting went to zero, and just stayed there. Have you tried the The voltage devider yet?
H2O2FromH20 3 years ago
The triangle wave needs a dc offset to place the entire wave within the voltage range of the input at pin 10. The cap is actually a good idea. Follow it with a voltage divider. This combo should place the triangle wave at a constant DC offset that doesn't vary with freq.
cuke8466 3 years ago
I tried the voltage divider today. First tried it with the cap and straight biasing, but it hacked the triangle wave. Switched to just a divider and everything went great. I used 6.2K in series with the signal, and 10K from pin 9 to ground. Reduced R1 to 200 ohms to bring freq up to 11.5KHz, and had 100% duty cycle through the bandwidth.
I noticed a lot of oscillation in duty cycle when current limiting was in effect. I added a 47uF cap from pin 10 to ground and that stabilized limiting.
cuke8466 3 years ago
I should also note that with the FET driver, there was no noticeable increase in FET temp at 11.5KHz.
cuke8466 3 years ago
Great cuke8466, I love it when a problem can be solved, The only thing better is having less componets. I have Multisim from National Instruments A circuit simuator. Untill now I had a problem with the LM324 working in the program, I have been able to get it to function with this oscillator by subing U1B with a Virtual opamp. I can now get realistic outputs. I tried the cap in series with the signal and the addition of DC biasing. Look like that will work as well.
H2O2FromH20 3 years ago
What looks vary promising is reducing R5 to about 8K lower if needed, The R4, R5 divider provides the Biasing to the oscilator, and seems to function perfectly, The cap is a great addition, I have also seen oscillation!, is the cap electrolittic? Space on my layout is a premium. An other 47uF cap no more room! Do you think a smaller ceramic cap would work there? I played with R1 too, Noticed small increase as i lowerd R1, or the pot. I will try 1.1k for R1 simulator has freq at 10.5KHz.
H2O2FromH20 3 years ago
The 47uF is electrolytic. I also tried a 10uF ceramic and it also worked well, but still had a small amount of oscillation.
I should have checked power rating of the pot. Lowering R1 to 200 ohms burned it up. I guess a minimum for R1 should be around 500 ohms. Lowering the value of C1 would have been a better choice to bring freq up.
cuke8466 3 years ago
I have confirmed in circuit that R5 Will Change the DC bias at U1 Pin 9, I used a 7.5K at R5 and Modified the Frequency to 11.6KHz with a 1.21K at R1, and I had 100% duty cycle through the bandwidth. Still need to improve the lower limit, currently its at 1.36KHz would like it to be in specification at 1KHz.
H2O2FromH20 3 years ago
When will you be hooking up your cell?
maxx347743 3 years ago
Soon Have to get my bubbler made and installed!
H2O2FromH20 3 years ago