I have a question - I notice that both the HSYNC and VSYNC are timer generated. Is that the case? Should there be any phase difference between the two signals or is it OK for them to arrive simultaneously. IE. Can i set both timers and simply let run to generate the correct SYNCS? Thanks.
I have a question - I notice that both the HSYNC and VSYNC are timer generated. Is that the case? Should there be any phase difference between the two signals or is it OK for them to arrive simultaneously. IE. Can i set both timers and simply let run to generate the correct SYNCS? Thanks.
Shaunakde 10 months ago
Posting the link: ags.tu-bs.de/?id=e.lab:projekte:avrvga
Shaunakde 10 months ago
Do you generate video signal using ATmega644P only?
piomar123 10 months ago
@piomar123 An external parallel-to-serial shift register is used and a few resistors.
sebastianfpga 10 months ago
Google for "avr vga ags projekte" to find the schematics
sebastianfpga 10 months ago
Awesome work!
Shaunakde 1 year ago
whats your setup for that it looks awesome
conman33311 1 year ago